Astrileux designs and produces extreme ultraviolet photomasks: the reflective, multilayer-coated reticles that carry a chip's circuit pattern into the lithography tool. It's a single point of failure for the entire process — and a single point of leverage for performance.
Every layer of an advanced logic or memory chip starts as a pattern on a mask. At EUV wavelengths, that mask has to be defect-free at a scale measured in atoms — a multilayer mirror stack, an absorber pattern, and a pellicle protecting it all from a single stray particle that could ruin an entire wafer lot.
| Exposure Wavelength | 13.5nm (EUV) |
| Target Process Nodes | Sub-3nm logic & advanced memory |
| Substrate | Low thermal expansion multilayer blank |
| Defect Tolerance | Zero-defect actinic inspection standard |
| Protection | EUV pellicle, contamination-controlled handling |
ISS National Laboratory Program
Astrileux is pursuing superior material science in microgravity aboard the International Space Station National Laboratory, in partnership with CASIS — opening a research path that isn't available in any terrestrial cleanroom.
The goal: build on the pillars of chip manufacturing at the leading edge, enabling new semiconductor manufacturing space across the spectrum. Astrileux's extended team are pioneers of materials manufacturing in space.
See our space program partnersChips are designed on Earth. Increasingly, we believe part of how they're made could be refined off it.
Microgravity offers conditions no terrestrial cleanroom can replicate — a new frontier for advancing the materials science behind leading-edge chipmaking.
On-orbit materials work stands alongside Astrileux's terrestrial photomask program as another pillar of chip manufacturing at the leading edge.
As this research matures, it enables new semiconductor manufacturing space across the spectrum — from photomasks to future materials platforms powering AI hardware.
