Technology Primer

The physics behind the leading edge — and where it's taking computing next.

Every leap in AI capability sits on top of a physical limit: how small a feature you can etch onto silicon. This is the layer Astrileux works at, and why it matters for everything from data centers to deep space.

01 — Lithography at the Leading Edge

Extreme ultraviolet lithography, in plain terms.

To print a transistor smaller than a virus, you need light with a wavelength small enough to draw it. EUV lithography uses 13.5 nanometer light — generated by vaporizing tin droplets with a laser — to project a circuit pattern from a photomask onto a silicon wafer, layer by layer, at nodes below 3 nanometers.

1

Light Source

Tin plasma emits EUV light at 13.5nm, generated tens of thousands of times per second.

2

Illumination Optics

Mirrors — glass absorbs EUV — shape and direct the light onto the mask at a precise angle.

3

Photomask

Astrileux's reticle carries the circuit pattern as a reflective, multilayer-coated blank.

4

Projection Optics

The pattern is reduced roughly 4x and reflected down onto the wafer's photoresist layer.

5

Wafer Exposure

Exposed resist is etched, repeated across dozens of layers to build a finished chip.

02 — Scale of Compute

Why the numbers keep changing units.

Model sizes, sensor networks, and data pipelines have moved from petabytes toward yottabytes — a scale that only makes sense in relation to what's generating it: racks of GPUs in datacenters training and running models around the clock, early quantum processors working through problems classical chips can't touch, and billions of connected devices producing data every second.

1024 Bytes in a Yottabyte
2nm–3nm Leading Logic Nodes
Billions Connected Edge Devices
Hundreds Qubits in Leading Quantum Chips
24/7 GPU & Agentic Inference Cycles
Rows of GPU server racks in a datacenter aisle
GPU clusters and quantum processors are two different bets on where compute goes next — both depend on the same leading-edge lithography to get built at all.
03 — What's Being Built On This

Three forces driving demand for smaller, denser chips.

Yottabyte Computing

Data at planetary scale

Satellite constellations, genomics, climate modeling, and always-on sensors are pushing global data generation toward the yottabyte range. Storing and moving it is one problem; the GPUs and specialized chips that process it in datacenters in real time are another — and that's where node scaling matters most.

Scale of Connectivity

Everything becomes an endpoint

Vehicles, satellites, industrial sensors, and wearables are all becoming compute nodes in their own right. Each one needs silicon efficient enough to run locally — which is only possible because of the same leading-edge lithography that powers data-center AI.

Future Applications

Where smaller nodes lead

Autonomous systems on land, sea, air, and in orbit; quantum-classical hybrid computing; on-device generative AI; and manufacturing processes — like Astrileux's own on-orbit photomask work — that couldn't exist without the density gains EUV lithography makes possible.

Futuristic connected city with autonomous vehicles and aerial drones on illuminated transit corridors
Scale of connectivity: every vehicle, drone, and sensor here is a compute node in its own right.
Rendering of a humanoid robot with visible internal processor and circuitry
Future applications: autonomous, agentic systems that reason and act in the physical world.
04 — Generative & Agentic AI Chips

From answering to acting.

Generative models predict the next token. Agentic systems plan, call tools, and execute multi-step tasks continuously. That shift multiplies compute demand — agentic workloads run longer, reason more, and need silicon with more transistors per watt to stay economical.

  • Higher transistor density per die
  • Lower power draw per inference
  • Faster on-chip interconnect for reasoning loops
Rendering of an AI processor die with an overlaid neural network, mounted on a circuit board
Every layer of a generative or agentic AI chip is patterned by a mask like the ones Astrileux builds.
05 — From Photomask to Metropolis

One reflection, scaled into the skyline it powers.

Follow the light: it strikes the mask and reflects outward — and the same pattern that etches a chip, multiplied across billions of them, is what a connected, always-on future city like the one shown earlier actually runs on.

Next

See the photomask this all runs through.

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